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Communication Platform Architectures for Gigascale Integration (COMPLAIN) is an Academy of Finland, TEKES and Vinnova funded project focused on researching new protocols, architectures and the implementation of synthesizable blocks, exploring the implementation of the software tools and using some stablished interface as our network interface. The Academy of Finland / Vinnova project was launched in February 2001 and the TEKES project effectively in April 2001.
The project aims at identifying new solutions for flexible and configurable module-to-module communication between multiple on-chip processors and shared/distributed memory in the electrically harsh environment of low-voltage high-speed circuits. The communication architecture shall be scalable to the extent of the gigatransistor scale complexity.
The groups involved are Tampere University of Technology (TUT), University of Turku (UTU) and KTH Royal Institute of Technology in Stockholm. In Finland the emphasis is more on electrical issues at UTU and on logical/architectural issues at TUT.
Latest News
| 30-May-2003 | New webpage for the project |
Last update: 17-April-2004